| Week |
Date |
Slides |
Exercises |
| 1 |
19.09 |
Case Study 1
ARM Architecture and the Lab's Hardware (BCM 2836 on a Raspberry Pi 2)
|
Minimal ARM Setup, Linking, GPIO control |
| 2 |
26.09. |
Cross-Development, Programming Language Oberon, Linking and Loading
|
Ex 01 continued,
Linking, Loading and Unloading
|
| 3 |
03.10. |
Virtual Memory Management
|
Ex 02 continued,
Using the MMU to Balance Heap and Stack
|
| 4 |
10.10. |
IRQs and Scheduling
|
Ex 03 continued,
Watchdog |
| 5 |
17.10. |
SPI, MMC/SD Cards, RS232
|
Ex 04 continued,
SPI Driver
|
| 6 |
24.10. |
Case Study 2: A2
Interrupt System (Intel x86 APIC), Active Oberon Computing Model, A2 Kernel
|
Assignment 5 continued;
Debugging a Kernel
|
| 7 |
31.10. |
Stack Management, Context Switches, Activity Management, Priority Inheritance
|
Assignment 5 and 6 continued;
Implementing Priority Inheritance
|
| 8 |
7.11. |
Priority Inheritance (slides last week),
Garbage Collection, Object File Format
|
Assignment 7: Implementing Priority Inheritance
|
| 9 |
14.11. |
Lock-Free Kernel: Lock-freedom, Memory-model, Contention and backoff, Memory re-use and ABA problem, Pointer Tagging and Hazard Pointers, Non-blocking (scheduling) queue
|
Assignment 7 continued
|
| 10 |
21.11. |
Lock-Free Kernel (2): Cooperative multitasking and Thread local storage.
|
Lock free implementation of a Mutex (RPI / x86)
|
| 11 |
28.11. |
Case Study 3: RISC (Lectures by Paul Reed)
Custom-Designed Single Processor: The RISC architecture
|
Tools + Workflow,
Instruction Timer,
Light Detector
|
| 12 |
5.12. |
Project Oberon on RISC
|
Screensaver, Wireless Network Traffic Monitor, Network Time Client
|
| 13 |
12.12. |
Case Study 4: Active Cells
Custom-Designed Systems On Chip. A Programming Model
|
Ex 10 ctd. Multicore Computing on FPGAs – Implementation of the Simon Game
|
| 14 |
19.12. |
Behind the Scenes of Active Cells. TRM Processor and Interconnects
TRM Implementation (not covered in class)
|
Ex 11 ctd.
|
